FPGA Development for Radar, Radio-Astronomy and Communications 2017

Course Information

Dates: 17 to 21 July 2017

Presenter: John-Philip Taylor

Course code: EEE5132Z

Venue: Menzies Seminar Room, 6th Floor, Menzies Building (Upper Campus), University of Cape Town

Course Description

This course presents the principles and techniques fundamental to low-level FPGA firmware development. It is biased towards digital signal processing typically found in Radar, Radio-astronomy and Communication systems.

Although the course focuses on Altera tools, Xilinx tools are similar. After completing this course, the participant will have enough background to make use of the Xilinx tool-set with minimal effort.

Embedded soft-core processors and SoC systems are not included in this course.

Download the course handout.

Course Overview

• Design FPGA firmware systems on a high level
• Design FPGA firmware blocks on a low level (i.e. RTL representations of finite state machines and pipelines)
• Implement FPGA firmware systems
• Debug an FPGA firmware implementation
• Analyse timing closure issues and solve the problem such that the final design meets all timing requirements.